1. Field of the Invention
This invention relates generally to an industrial process, and, more particularly, to initiating test runs in a semiconductor fabrication runs based on fault detection results.
2. Description of the Related Art
There is a constant drive within the semiconductor industry to increase the quality, reliability and throughput of integrated circuit devices, e.g., microprocessors, memory devices, and the like. This drive is fueled by consumer demands for higher quality computers and electronic devices that operate more reliably. These demands have resulted in continual improvements in the manufacture of semiconductor devices, e.g., transistors, as well as in the manufacture of integrated circuit devices incorporating such transistors. Additionally, reducing the defects in the manufacture of the components of a typical transistor also lowers the overall cost per transistor as well as the cost of integrated circuit devices incorporating such transistors.
During the fabrication process, various events may take place that affect the performance of the devices being fabricated. That is, variations in the fabrication process steps may result in device performance variations. Factors, such as feature critical dimensions, doping levels, contact resistance, particle contamination, etc., all may potentially affect the end performance of the device. Various tools in the processing line are controlled, in accordance with performance models, to reduce processing variation. Commonly controlled tools include photolithography steppers, polishing tools, etching tools, and deposition tools. Pre-processing and/or post-processing metrology data is supplied to process controllers for the tools. Operating recipe parameters, such as processing time, are calculated by the process controllers based on the performance model and the metrology information to attempt to achieve post-processing results as close to a target value as possible. Reducing variation in this manner leads to increased throughput, reduced cost, higher device performance, etc., all of which equate to increased profitability.
Processing tools are routinely calibrated to reduce process variations. Test runs, such as qualification runs or experimental runs, are commonly conducted to calibrate the processing tools or diagnose processing problems associated with the processing tools. The tests runs are typically triggered at scheduled intervals, such as every 24 hours, or are initiated by the occurrence of selected events, such as preventative maintenance events. Unfortunately, these test runs are initiated at scheduled times or events regardless of whether the processing tools require calibration. As such, valuable time and resources, in the form of wafers, for example, may be wasted, in instances where calibration of the processing tools may not be necessary.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.